ACE² Lab (AI, Circuits & EDA · Automated Circuit Engineering) at North Dakota State University is dedicated to tackling three converging semiconductor challenges: transistor density limits, ASIC design cost explosion, and LLM inference scaling. Our research spans process-aware EDA frameworks for Monolithic 3D ICs, machine-learning-driven ASIC design automation, and custom Compute-in-Memory ASIC accelerators for efficient LLM inference at scale and on edge devices.

We collaborate with academic and industry partners across the U.S. and internationally, with funding from NSF CAREER, NSF CRII, USDA NIFA, and ND EPSCoR, totaling over $6.97M in competitive grants.

We focus on the following research thrusts:

  • EDA for Monolithic 3D IC (M3D-IC) — process-aware placement, routing, MIV utilization, and thermal modeling across stacked tiers
  • ML for ASIC Design Automation — graph neural networks, reinforcement learning, and LLMs for RTL generation and physical design
  • ASIC for LLM Acceleration — Compute-in-Memory architectures for transformer inference on edge hardware

Prospective Students

We are actively recruiting motivated Ph.D. and M.S. students with backgrounds in electrical or computer engineering, computer science, or related fields. Research areas include IC design automation, hardware for machine learning, monolithic 3D IC EDA, and power delivery networks.

To apply, please email umamaheswara.tida@ieee.org with:

  • CV / Resume
  • Unofficial transcripts
  • Brief statement of research interest
  • Preferred research area (IC design automation, HW for ML, 3D IC EDA, PDN)
  • GRE Quantitative score > 165
[2026/04] 🏆 Navya Goli wins 2nd place at the Agentic AI Design Verification Challenge at ISQED 2026, achieving the top score in Phase 2: Coverage Closure.
[2026/03] 🏛️ Dr. Tida attended the NSF Workshop on Agents for Chip Design Automation hosted at UCLA.
[2026/02] 📄 New paper: CQ-CiM — hardware-aware embedding shaping for robust CiM-based retrieval. Accepted at DAC 2026.
[2025/06] 🌐 Dr. Tida receives NSF IRES Award as Co-PI for international research experiences on RFID Sensing Systems with ML.
[2025/04] 📄 New preprint: ComplexVCoder — LLM framework for complex Verilog RTL generation (arXiv:2504.20653).
[2025/02] 🏆 Dr. Tida receives the NSF CAREER Award ($553K, 2025–2030) for process-aware EDA for M3D integration — awarded on first attempt.
[2025/01] 📄 Paper published in PLOS ONE: Automating amino acid identification in elliptical dichroism spectrometers with ML.
[2024] 📄 Two papers at ISVLSI 2024 on compact 6T-SRAM design and Monolithic 3D integration design considerations.
Dr. Umamaheswara Rao Tida
Dr. Umamaheswara Rao Tida
Director, ACE² Lab
Assistant Professor of ECE
umamaheswara.tida@ieee.org (701) 231-5369

Director

Dr. Umamaheswara Rao Tida is an Assistant Professor in the Department of Electrical & Computer Engineering at North Dakota State University and Director of the ACE² Lab. He received his Ph.D. in Electrical Engineering from Southern Methodist University, Dallas, TX, with a dissertation on Through-Silicon-Via inductors and 3D IC power delivery. Prior to NDSU, he gained research experience at Intel (Hillsboro, OR) and has collaborated with Georgia Tech, National Tsing Hua University, and international research centers.

His research has resulted in 1 book chapter, 16 journal articles, 22 conference papers, and 20 invited talks at leading universities and IEEE/ACM venues. His work is supported by NSF CAREER, NSF CRII, USDA NIFA, and ND EPSCoR, totaling over $6.97M in competitive grants. He received the NSF CAREER Award on his first attempt in 2025.

🏛️ Dept. of Electrical & Computer Engineering, NDSU 📍 Offerdahl West 101K · Fargo, ND 58102