Custom IC layout, circuit verification, and fabrication-aware design strategies using industry VLSI design flows.
This course covers the principles and practice of custom VLSI integrated circuit design. Students gain hands-on experience with CMOS analog and digital cell design, from schematic capture through full-custom layout, parasitic extraction, and design rule checking. The 623 (graduate) section includes additional treatment of advanced topics and a project involving design and simulation of a custom functional block.
Students completing this course will be able to: (1) create full-custom CMOS layouts adhering to fabrication design rules; (2) perform circuit verification using DRC, LVS, and post-layout simulation; (3) analyze and mitigate parasitic effects in custom IC design; and (4) understand and navigate a professional Process Design Kit (PDK).