ACE² Lab (AI, Circuits & EDA · Automated Circuit Engineering) at Clemson University is dedicated to tackling three converging semiconductor challenges: transistor density limits, ASIC design cost explosion, and LLM inference scaling. Our research spans process-aware EDA frameworks for Monolithic 3D ICs, machine-learning-driven ASIC design automation, and custom Compute-in-Memory ASIC accelerators for efficient LLM inference at scale and on edge devices.
We collaborate with academic and industry partners across the U.S. and internationally, with funding from NSF (CAREER, CRII, FMSG, IRES, PFI-TT), USDA, and ND EPSCoR, totaling approximately $5.85M in competitive grants.
We focus on the following research thrusts:
- EDA for Monolithic 3D IC (M3D-IC) — process-aware placement, routing, MIV utilization, and thermal modeling across stacked tiers
- ML for ASIC Design Automation — graph neural networks, reinforcement learning, and LLMs for RTL generation and physical design
- ASIC for LLM Acceleration — Compute-in-Memory architectures for transformer inference on edge hardware
Prospective Students
We are actively recruiting motivated Ph.D. and M.S. students with backgrounds in electrical or computer engineering, computer science, or related fields. Research areas include IC design automation, hardware for machine learning, monolithic 3D IC EDA, and power delivery networks.
To apply, please email umamaheswara.tida@ieee.org with:
- CV / Resume
- Unofficial transcripts
- Brief statement of research interest
- Preferred research area (IC design automation, HW for ML, 3D IC EDA, PDN)
- GRE Quantitative score > 165
Recent News
Director
Dr. Umamaheswara Rao Tida is an Associate Professor in the Holcombe Department of Electrical & Computer Engineering at Clemson University and Director of the ACE² Lab. He received his Ph.D. in Electrical Engineering from the University of Notre Dame in 2019, advised by Dr. Yiyu Shi, with a dissertation on Through-Silicon-Via inductors in 3D ICs. He earned his M.S. in Computer Engineering from the Missouri University of Science and Technology and his B.Tech. in Electronics and Communication Engineering from Acharya Nagarjuna University, India.
Before joining Clemson in 2026, he spent seven years as an Assistant Professor at North Dakota State University. His industry experience includes a research co-op at Intel Labs and a research internship with Intel's Signal and Power Integrity group, both in Hillsboro, OR. He has given invited talks at institutions including Georgia Tech and National Tsing Hua University.
His research has produced 1 book chapter, 13 journal articles, 22 conference papers, and 11 invited talks and presentations at leading universities and IEEE/ACM venues. His work is supported by NSF (CAREER, CRII, FMSG, IRES, PFI-TT), USDA, and ND EPSCoR, totaling approximately $5.85M in competitive grants. He received both the NSF CAREER Award (2025) and the NSF CRII Award (2021) on his first attempt, along with the College of Engineering Early Career Award (2025) and a Teaching Innovation Award (2023). He serves as an Associate Editor for Integration, the VLSI Journal.
He has graduated 1 Ph.D. and 5 M.S. thesis students, and currently advises 2 Ph.D., 3 M.S., and 2 undergraduate researchers.